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submitted 7 months ago by throws_lemy@lemmy.nz to c/technology@beehaw.org
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[-] RickRussell_CA@beehaw.org 13 points 7 months ago

It's not "inexplicable".

DIMM mounting brackets introduce significant limitations to maximum bandwidth. SOC RAM offers huge benefits in bandwidth improvement and latency reduction. Memory bandwidth on the M2 Max is 400GB/second, compared to a max of 64GB/sec for DDR5 DIMMs.

It may not be optimizing for the compute problem that you have, and that's fine. But it's definitely optimizing for compute problems that Apple believes to be high priority for its customers.

this post was submitted on 09 Nov 2023
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